REFERENCE DESIGN

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REFERENCE DESIGN

This is a power solution for AMD Xilinx Zynq UltraScale+ MPSoC’s XCZU3EG using discrete PMICs and LDOs. This solution meets the tight regulation of each rail in a small footprint.

REFERENCE DESIGN

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REFERENCE DESIGN

This is a power solution for AMD Xilinx Zynq UltraScale+ MPSoC’s XCZU3EG using PMIC modules and LDOs. This solution meets the tight regulation of each rail in a small footprint.

REFERENCE DESIGN

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REFERENCE DESIGN

The MPS Industrial Ethernet Reference design for the AMD Xilinx Zynq-7000 SoC combines a small footprint with good efficiency and tight regulation. Three MPM3630 3 amp buck modules combine with an MPM3610 1 amp buck module and two LDO regulators to provide power rails to the Zynq SoC. The output rails are from 0.75V to 3.3V, from a 12V input supply.