VIRTEX UltraScale+ (Discrete Solution)

This is a design is for powering VIRTEX UltraScale+ family (XCVU3P – XCVU37P) of FPGAs. This design is optimized for lowest cost and highest efficiency.

  • Small footprint < 4.0 sqin
  • High Efficiency > 90%
  • Vin 12V
Block Diagram VIRTEX UltraScale+

Design Files

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Additional Information English

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